Arrangement for through-connection of current pulses to a ferrite-core memory



United States Patent Oflice 3,245,061 Fatented Apr. 5, 1966 3,245,061 ARRANGEMENT FOR THROUGH-CONNECTION OF CURRENT PULSES TO A FERRlTE-CORE MEMORY Arndt Irmisch, Stuttgart-Zuitenhausen, Germany, assignor, by mesne assignments, to International Standard Electric Corporation, New York, N.Y., a corporation of Delaware Filed Aug. 31, 1962, Ser. No. 220,767 Claims priority, application Germany, Sept. 9, 1961, St 18,307 2 Claims. (Cl. 340-174) The invention relates to an arrangement for the through-connection of a reading pulse current source in one polarity and a writing pulse current source in the opposite polarity to the address wires of a ferrite core memory. Both pulse current sources have the same polarity.

There are through-connection arrangements already known at which two pulse current sources of same polarity are connected via a common electronic switch to two windings with opposite polarity of a transformer, so that at the secondary winding current pulses of opposite polarity can be derived.

If, however, the number of the address wires to be selected is very large, a proper steepness of the current pulse flanks can be realized only with difficulties. This is due to the fact that the vestigial impedances of all nonselected circuits of the remaining address wires are in parallel to the circuit of the address wire selected. These impedances for each nonselected address wire consist of the series-connection of the winding inductances with the capacities between the primary windings and the secondary winding, because one terminal of the secondary winding is grounded. The winding capacities are in most cases very high because the transformer must be wound specially to have a very low leakage inductance. These vestigial impedances now cause series resonant circuits all of which must be fed by the pulse current source and, therefore, cause a very poor steepness of the pulses in the address wire selected.

The invention now relates to a through-connection arrangement at which even for many address wires to be connected a proper steepness of the current pulses is achieved.

The general solution of the problem is to bias the two decoupling diodes, at switch open in the reverse direction, by a voltage source to such an extent that the diodes cannot be opened by the peak voltages occurring at the primary windings.

In case of a favourable design of the invention the voltage source is. applied via a series resistor to the interconnected first winding ends of the primary windings and will be led to the two decoupling diodes which are connected with the two pulse current sources via the second two winding ends of the primary windings.

So, it is possible with just one resistor in addition per through-connection to eliminate the detrimental vestigial impedances and thus to improve the pulse shape of the switched through pulses intrinsically.

The invention will now be explained more closely with the aid of the FIGS. 1 and 2 as an example.

FIG. 1 shows a known arrangement to through-connect current pulses, and

F162 shows the arrangement according to the invention.

FIG. 1 represents an arrangement already known with it switches of which one is through-connected. For example, switch S of the through-connection D82 is closed.

The writing pulses i or read pulses i, impressed by the pulse current source will be connected to ground via the primary windings W1 and W2 respectively and the decoupling diodes D1 and D2, and via the closed switch S. The two primary windings are wound in opposition to each other and, consequently, opposite polarized pulses are induced in the secondary winding depending on which of the two primary windings is fed, and the address wire A energized.

In parallel to these through-connected circuits are the vestigial impedances of the remaining not through-connected circuits (D8 DS These impedances are composed for each circuit of a series-connection of the winding inductance of the transformer and the winding capacity between the primary windings (eg. W1 and W2) and the secondary winding W3, one terminal of which is grounded. The winding capacities of the transformers are relatively high because the stray inductances must be kept low by a special design of the winding.

This series connection of transformer inductances and winding capacities result in a series resonant circuit for each current circuit which derives a certain portion from the impressed write or read current pulses. If the number 11 of the address wires to be through-connected is very high, the parallel located (n-l) series resonant circuits are disadvantageous for the rising flank of the through-connected current pulse and further cause undesirable transient phenomena. In very fast memories the flank of the pulse required is so steep that it cannot be attained by the through-connecting arrangements hitherto known.

FIG. 2 now demonstrates the arrangement according to the invention in which the interfering influence of the vestigial impedances of nonselected circuits is eliminated.

This is achieved by placing the diodes D1 and D2 between the current pulse lines and the connection of the primary windings oil? the switch side and by biassing the point of the primary windings common with the switch via the resistors R through the DC. voltage source U. Thereby, the diodes of the circuits not to be throughconnected, are biassed in such a way that the pulse peak voltage occurring on the primary winding of the throughconnected circuit cannot open the diodes. The diodes themselves possess a certain capacity but this capacity is considerably less than the winding capacity of the transformers.

The pulse current source to be through-connected is not loaded by vestigial impedances since the diodes of the non-selected circuits are blocked as long as the corresponding switch is open. The diodes bias is inefiicient, if the switch (S) of one selected through-connection (DSl D811) is closed.

While I have described above the principles of my invention with specific apparatus, it is to be clearly understood that this description is made only by way of ex ample and not as a limitation to the scope of my invention as set forth in the objects thereof and in the accompanying claims.

What is claimed is:

1. An arrangement for the through-connection of current pulses of opposite polarity to one of several address wires of a ferrite core memory at which a read pulse current source and a write pulse current source having both the same polarity are connected via two decoupling diodes and an electronic switch to two primary windings with opposite polarity of a transformer, the secondary winding of which feeds the corresponding address wire to be selected, characterised in this, that the two decou- 3 pling diodes (D1 and D2) are biassed at switch (S) open in reverse direction from a voltage source (U) to such an extent that these diodes cannot be opened by the peak voltages occurring at the primary windings.

2. An arrangement according to claim 1, characterised in this, that the voltage of the voltage source (U) is applied to the interconnected first winding ends of the primary winding (W1 and W2.) via a series resistor (R),

and that this voltage is led via the second two winding ends of the primary windings to the two decoupling diodes (D1 and D2) which are connected with the two pulsecurrent sources (i and i,).

No references cited.

IRVING L. SRAGOW, Primary Examiner. 

1. AN ARRANGEMENT FOR THE THROUGH-CONNECTION OF CURRENT PULSES OF OPPOSITE POLARITY TO ONE OF SEVERAL ADDRESS WIRES OF A FERRITE CORE MEMORY AT WHICH A READ PULSE CURRENT SOURCE AND A WRITE PULSE CURRENT SOURCE HAVING BOTH THE SAME POLARITY ARE CONNECTED VIA TWO DECOUPLING DIODES AND AN ELECTRONIC SWITCH TO TWO PRIMARY WINDINGS WITH OPPOSITE POLARITY OF A TRANSFORMER, THE SECONDARY WINDING OF WHICH FEEDS THE CORRESPONDING ADDRESS WIRE TO BE SELECTED, CHARACTERISED IN THIS, THAT THE TWO DECOUPLING DIODES (D1 AND D2) ARE DIASSED AT SWITCH (S) OPEN IN REVERSE DIRECTION FROM A VOLTAGE SOURCE (-U) TO SUCH AN EXTENT THAT THESE DIODES CANNOT BE OPENED BY THE PEAK VOLTAGES OCCURING AT THE PRIMARY WINDINGS. 